PART |
Description |
Maker |
M29W160EB70N1 M29W160EB70N1T M29W160EB70N6 M29W160 |
16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs 56-BGA MICROSTAR JUNIOR -40 to 85 16兆位(含2Mb x8兆x16插槽,引导块3V电源快闪记忆 CAP 3300UF 6.3V ELECT FC RADIAL 16兆位(含2Mb x8兆x16插槽,引导块V电源快闪记忆 16 Mbit (2Mb x8 or 1Mb x16 / Boot Block) 3V Supply Flash Memory 16 MBIT (2MB X8 OR 1MB X16, BOOT BLOCK) 3V SUPPLY FLASH MEMORY 70ns; V(in/out): -0.6 to 0.6V; 16Mbit (2Mb x 8 or 1Mb x 16, boot block) 3V supply flash memory
|
STMicroelectronics N.V. ST Microelectronics SGS Thomson Microelectronics
|
M29W160DB M29W160DB70M1T M29W160DB70M6T M29W160DB7 |
16 Mbit 2Mb x8 or 1Mb x16, Boot Block 3V Supply Flash Memory 16 Mbit (2Mb x8 or 1Mb x16, Boot Block) 3V Supply Flash Memory
|
ST Microelectronics STMICROELECTRONICS[STMicroelectronics]
|
M29W160DT90ZA6T M29DCL3-16T M29W160DB M29W160DB70M |
From old datasheet system 16 Mbit (2Mb x8 or 1Mb x16, Boot Block) 3V Supply Flash Memory
|
STMICROELECTRONICS[STMicroelectronics] ST Microelectronics
|
LH28F160S3 LH28F160S3-L10 LH28F160S3-L13 LH28F160S |
LH28F160S3NS-L150 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 56 pin SSOP LH28F160S3HT-L130 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 56 pin TSOP LH28F160S3D-L100 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin SDIP LH28F160S3HNS-L120 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 56 pin SSOP LH28F160S3HNS-L10 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 56 pin SSOP LH28F160S3HD-L13 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin SDIP LH28F160S3HD-L10 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin SDIP LH28F160S3HB-L130 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin CSP LH28F160S3HB-L120 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin CSP LH28F160S3HB-L10 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin CSP 16-MBIT(2MBx8/1MBx16) Smart 3 Flash MEMORY 16-MBIT (2MBx8/1MBx16) Smart 3 Flash MEMORY LH28F160S3HB-L100 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin CSP LH28F160S3HB-L13 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin CSP LH28F160S3HB-L150 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin CSP LH28F160S3HD-L120 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin SDIP LH28F160S3HD-L150 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin SDIP LH28F160S3HNS-L100 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 56 pin SSOP LH28F160S3D-L13 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin SDIP LH28F160S3R-L10 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 56 pin TSOP LH28F160S3HR-L120 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 56 pin TSOP
|
SHARP[Sharp Electrionic Components]
|
M36DR432AD M36DR432AD10ZA6T M36DR432AD12ZA6T M36DR |
32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256Kb x16 SRAM, Multiple Memory Product
|
STMICROELECTRONICS[STMicroelectronics]
|
M36W432TG70ZA1T M36W432TG85ZA6T M36W432TG-ZAT M36W |
32 Mbit 2Mb x16, Boot Block Flash Memory and 4 Mbit 256Kb x16 SRAM, Multiple Memory Product
|
意法半导
|
M36W432 M36W432B M36W432B70ZA1T M36W432B70ZA6T M36 |
32 Mbit 2Mb x16, Boot Block Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product
|
STMICROELECTRONICS[STMicroelectronics]
|
M36W416TG85ZA1T M36W416TG70ZA6T M36W416TG-ZAT M36W |
16 Mbit 1Mb x16, Boot Block Flash Memory and 4Mbit 256Kb x16 SRAM, Multiple Memory Product CANMS3470L16-23PL/C 16兆x16插槽,开机区块快闪记忆体Mbit的SRAM56Kb x16,内存产品多
|
意法半导 STMicroelectronics N.V.
|
M59DR032A M59DR032B M59DR032A120ZB1T M59DR032A100Z |
2M X 16 FLASH 1.8V PROM, 120 ns, PBGA48 32 Mbit 2Mb x16, Dual Bank, Page Low Voltage Flash Memory 32兆位Mb x16插槽,双行,第低压闪 32 Mbit 2Mb x16 / Dual Bank / Page Low Voltage Flash Memory 32 Mbit 2Mb x16, Dual Bank, Page Low Voltage Flash Memory
|
http:// NUMONYX STMicroelectronics N.V. 意法半导 ST Microelectronics
|
M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V 36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V 18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机 Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
|
Renesas Electronics Corporation. Renesas Electronics, Corp.
|